Dynamic random-access memory

Results: 789



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11What’s Inside Our Totally New Approach to Storage Technology

What’s Inside Our Totally New Approach to Storage Technology

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Source URL: www.crossbar-inc.com

Language: English - Date: 2016-08-15 01:51:06
12Paging in TinyOS Provide dynamic memory and paging capabilities in TinyOS using virtual addressing  Robin Z¨

Paging in TinyOS Provide dynamic memory and paging capabilities in TinyOS using virtual addressing Robin Z¨

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Source URL: disco.ethz.ch

Language: English - Date: 2014-09-26 08:36:59
13NVDIMM-N Cookbook: PRESENTATION TITLE GOES HERE A Soup-to-Nuts Primer on Using NVDIMM-Ns to Improve Your Storage Performance Jeff Chang VP Marketing and Business Development, AgigA Tech

NVDIMM-N Cookbook: PRESENTATION TITLE GOES HERE A Soup-to-Nuts Primer on Using NVDIMM-Ns to Improve Your Storage Performance Jeff Chang VP Marketing and Business Development, AgigA Tech

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Source URL: www.snia.org

Language: English - Date: 2016-08-22 16:31:39
14Session 1: Applications and Algorithms Using Hardware Accelerators • Towards Seismic Wave Modeling on Heterogeneous Many-core Architectures using Task-based Runtime System. Victor Martinez, David Michea, Fabrice Dupros

Session 1: Applications and Algorithms Using Hardware Accelerators • Towards Seismic Wave Modeling on Heterogeneous Many-core Architectures using Task-based Runtime System. Victor Martinez, David Michea, Fabrice Dupros

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Source URL: www2.sbc.org.br

Language: English - Date: 2015-11-17 13:13:59
15Flash’s Role in Big Data, Past Present, and Future Jim Handy Tutorial: Fast Storage for Big Data Hot Chips Conference

Flash’s Role in Big Data, Past Present, and Future Jim Handy Tutorial: Fast Storage for Big Data Hot Chips Conference

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Source URL: www.hotchips.org

Language: English - Date: 2013-08-15 17:44:06
16Chapter 6  The Memory Hierarchy To this point in our study of systems, we have relied on a simple model of a computer system as a CPU that executes instructions and a memory system that holds instructions and data for th

Chapter 6 The Memory Hierarchy To this point in our study of systems, we have relied on a simple model of a computer system as a CPU that executes instructions and a memory system that holds instructions and data for th

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Source URL: csapp.cs.cmu.edu

Language: English - Date: 2010-02-14 14:17:26
17BREAKING THE 2 GIGA ACCESS BARRIER: Overcoming Limited I/O Pin Counts

BREAKING THE 2 GIGA ACCESS BARRIER: Overcoming Limited I/O Pin Counts

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Source URL: www.steinwrites.com

Language: English - Date: 2010-07-20 21:33:13
18ISSN No: International Journal & Magazine of Engineering, Technology, Management and Research A Peer Reviewed Open Access International Journal

ISSN No: International Journal & Magazine of Engineering, Technology, Management and Research A Peer Reviewed Open Access International Journal

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Source URL: www.ijmetmr.com

Language: English - Date: 2015-09-09 06:37:44
19The Case for RAMClouds: Scalable High-Performance Storage Entirely in DRAM

The Case for RAMClouds: Scalable High-Performance Storage Entirely in DRAM

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Source URL: web.stanford.edu

Language: English - Date: 2011-02-02 19:01:43
20Power-Aware Memory Management © 2003, Carla Schlatter Ellis  ESSES 2003

Power-Aware Memory Management © 2003, Carla Schlatter Ellis ESSES 2003

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Source URL: www.cs.duke.edu

Language: English - Date: 2003-08-21 10:16:22